Signal Integrity

Power-aware Signal Integrity and EMI/EMC On High-speed Digital Chip-to-Chip Links

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Order Your Free DVD of the DesignCon Keysight Education Forum

Posted April 21st, 2015 · Please leave a comment · Seminar, Video

At DesignCon we presented the Keysight Education Forum. The talks are now available on a free DVD. Order yours today while supplies last!

DesignCon 2015 Keysight Education Forum DVD

DesignCon 2015 Keysight Education Forum DVD

The ten presentations are:

  • USB 3.1 Gen 2 (10 Gbps) Physical Layer Test Challenges
  • Practical Guide to Quickly Making 100G Electrical Measurements
  • PCIe protocol analysis for SSDs
  • Power Integrity Solution – Choosing the Right Measurement and Simulation Tools
  • DDR4/LPDDR4: Overcome the Barriers of Simulating, Testing and Probing High-Speed Memory Systems
  • Tips and Techniques to Characterize Signal Integrity Problems Quickly and Accurately
  • Simulation and Characterization of PAM-4 signals in 28G and 56G Designs
  • Gain Insight into DDR3/4 and LPDDR3/4
  • Surmounting the Challenges of 16 Gigabit Operation with PCI Express Rick Eads
  • Addressing the challenges of PAM-4 receiver stressed input testing

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DesignCon 2015 Papers

Posted February 10th, 2015 · Please leave a comment · Technical Paper

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Here are the papers from DesignCon 2015 that have one or more Keysight EEsof EDA co-author:

  • With Xilinx: Ultrascale DDR4 De-emphasis and CTLE Feature Optimization with Statistical Engine for BER Specification Paper Slides
  • With Xilinx: IBIS-AMI Modeling and Simulation of 56G PAM4 Link Systems Paper Slides
  • With Xilinx and John Baprawski Consulting: A New Methodology for Developing IBIS-AMI Models Paper Slides
  • With Speeding Edge and Wild River Technology: Breaking the 32 Gb/s Barrier: PCB Materials, Simulations, and Measurements Tutorial slides
  • With industry panelists, moderated by Martin Rowe: Closing The Loop: What Do We Do When Measurement & Simulations Don’t Match? Panel discussion

Thanks to our customer co-authors for working with us on these projects!

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Live Webcast Tomorrow: PCB Materials, Simulations, and Measurements for 32 Gb/s

Posted January 21st, 2015 · Please leave a comment · Webcast

Free registration for PCB Materials, Simulations, and Measurements for 32 Gb/s

My colleague Heidi Barnes is giving a webcast tomorrow titled PCB Materials, Simulations, and Measurements for 32 Gb/s with Lee Ritchey of Speeding Edge and Al Neves of Wild River Technology. Here is the abstract:

Abstract

Breaking the 32 Gb/s barrier for printed circuit board (PCB) channels requires a strong understanding of PCB stack-up design, simulation methods, and measurement techniques. How a PCB fabrication document calls out the materials, such as fiber weave and surface roughness, is critical to high speed performance. Accuracies of channel performance time and frequency domain simulations at the higher data rates require knowledge of as-fabricated material properties and tolerances. Design and measurement of test structures to validate the PCB stack-up performance require custom fixtures and implementation of high frequency calibration techniques, such as fixture removal. Understanding the basic flow and interaction of stack-up design, simulation, and measurement is critical for leverage of existing low cost PCB manufacturing technology for repeatable design performance. This webcast brings together experts in each of these three areas to demonstrate the basic flow of successful stack-up design with robust correlation between measurements and simulations at 32 Gb/s and beyond.

Hope to see you there!

Free registration for PCB Materials, Simulations, and Measurements for 32 Gb/s

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