Signal Integrity

Power-aware Signal Integrity and EMI/EMC On High-speed Digital Chip-to-Chip Links

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We’ve Moved!

Posted September 20th, 2017 · Please leave a comment · Notice

We’ve moved!

Keysight has a new Community platform that we’ve migrated to. This is the final posting at this site.

The new blog is here:

Keysight Blogs: EEsof EDA: Signal & Power Integrity.

Thank you for all your kind remarks over the past nine years!

In addition, the blog for my new project on power electronics is here:

Keysight Blogs: EEsof EDA: Power Electronics

Best regards,

— Colin

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PAM-4 Simulation to Measurement Validation

Posted June 29th, 2016 · Please leave a comment · Notice

This DesignCon paper discusses PAM-4 signaling and a new measurement and simulation eco-system. Simulation of PAM-4 signals are done with an IBIS-AMI signal generator, an S-parameter channel model,and remote access software for receiver data recovery. Measured data is from commercially available equipment with specialized waveform processing. Try a free ADS 30-day trial. 2016-06-29_12-32-15

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Practical Approach for Signal Integrity Analysis of High Data Rate Channels Free One – Hour Webcast in July

Posted June 29th, 2016 · Please leave a comment · Notice

Keysight EEsof EDA’s Tutorials in Signal Integrity webcast series is important to Signal integrity engineers who may not have the time or budget to attend continuing education classes on the latest design tools and techniques. This webcast highlights various technologies used for channel modeling, each with advantages and disadvantages, by utilizing real-world FPGA board routing and USB connector design examples. Several state-of-the-art analysis technologies will be highlighted to illustrate the end-to-end modeling of high data rate channels that include ICs, PCB interconnects, vias and connectors.


Register here.

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