Guest post by Eric Bogatin, signal integrity evangelist.
We microwave minute-rice to cook it faster. We get our news from the one liners of late night talk show comedians. In this perspective, I gave a talk — as a distinguished lecturer for the IEEE EMC society — on "Ten Habits of Highly Successful Board Designers." Everyone is welcome to download a full copy of my presentation. Colin invited me to post this summary here. If you get your philosophy of life from bumper stickers, then you’ll want to design your boards based on these ten rules, presented for your entertainment:
- Use as low a differential impedance as you can get away with.
- Keep the differential impedance of signal lines constant by adjusting line width when the coupling changes.
- Use tightly coupled differential pairs when interconnect density is critical, use loosely coupled differential pairs when loss is over riding.
- Keep the length skew between the lines in a pair less than 60 mils/(bit rate in Gbps)
- When possible, route the signal lines off axis from the glass weave.
- Minimize the discontinuity of DC blocking capacitors by using the minimum size capacitor pads and use cut outs in the nearest ground plane when the pad width is larger than the surface trace width.
- Keep the length of via stubs, in mils, as short as possible, and no longer than 300 mils/(bit rate in Gbps).
- Increase the impedance of vias by removing NFPs (non-functional pads on intermediate layers) and use as wide a clearance hole as you can get away with.
- Use a return via adjacent to all differential signal vias.
- Use pre- or de- emphasis on TX and equalization on the RX.
- Bonus pointer: Ask your fab vendor for smoother copper.