Signal Integrity

Power-aware Signal Integrity and EMI/EMC On High-speed Digital Chip-to-Chip Links

Signal Integrity header image 2

You’re Invited: Overcoming Return-path Discontinuity in DDR3/GDDR5 Memory Controller Packages

Posted October 11th, 2011 · Please leave a comment · Webcast

Share

Updated, October 17, 2011: Thanks to everyone that attended! The on-demand recording is now posted.

You’re invited to a case study webcast:

Overcoming Return-path Discontinuity in DDR3/GDDR5 Memory Controller Packages

October 13, 2011, two time slots:
7AM Pacific/10AM Eastern/16:00 Central Europe
or
10AM Pacific/1PM Eastern

Why this Webcast is important

DDR3 and GDDR3/5 memory technology running in the Giga-bit range require 3D EM accurate modeling of RF phenomena such as the impact of GND-PTH stitches (Ground Plated Through Hole) used to connect reference ground-planes in the Memory controller packages (MCH-PKG). Cost-reduction requires minimizing the number of layers and vias on MCH-PKG (micro-vias and PTH). Layout-Designers usually revert to reduce the GND-PTH without studying the impact on the performance. In this webcast, Method of Moments (MoM) is used to study the impact of GND-PTH on data eye-opening as well as on Radiated-Emission of a DDR3 two-SODIMMs/channel running at 1.33GB/s.

Who should view this Webcast

Signal integrity engineers and high speed digital engineers of multigigabit links who are running into effects previously only seen in RF and microwave circuits.

Register today for Overcoming Return-path Discontinuity in DDR3/GDDR5 Memory Controller Packages

Tags:

Please leave the first comment so far ↓

Please leave the first comment.

Leave a Comment