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Fast Track for Mid-Channel Repeaters in IBIS AMI

Posted May 31st, 2013 · Please leave a comment · Notice

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By Colin Warwick

Update: On Friday June 7th, 2013 IBIS Open Forum voted to approve our proposed enhancement and add it to the next release of IBIS!

Figure: ADS 2013.06 lets you explore the design space of a chip-to-chip link that includes a mid-channel retimer.

I can’t keep up with the fast pace for mid-channel repeater modeling. When I wrote the ADS 2013 press release (Agilent Technologies Introduces Electrical Retimer Solution to Solve Key Challenges in Designing Chip-to-Chip Links) announcing our support for a pre-standard extension to IBIS AMI that allows you to build retimer models in SystemVue and run them in ADS Channel Simulator, I said:

Agilent will submit a proposed enhancement to the IBIS Open Forum later this year. The intent is to incorporate the new techniques into a future version of the IBIS standard. This will ensure retimer model portability across EDA tools in future.
…but boy was I wrong…

Here’s what actually happened. Several customers wanted to add this to the specification urgently, but the train was about to leave the station. We had to get the proposal in by May 24th to have a chance of getting it into the next release of IBIS. Working with the members of the IBIS Open Forum, we enhanced our prior proposed change to the standard (called BIRD 156.1, which only dealt with redrivers) and came up with BIRD 156.2 (“IBIS-AMI Extension for Mid-channel Redrivers and Retimers“) just in the nick of time.

So by the time the press release came out on May 29th, the promise of “will submit” had morphed to “has submitted.”

Still, good times! Thanks to the IBIS Open Forum for fast action, especially my co-authors of BIRD 156.2: Mahbubul Bari, Ron Olisar, and Hassan Rafat of Maxim Integrated; Fangyi Rao of Agilent; Walter Katz and Todd Westerhoff of SiSoft.

PS Redriver support was added last year in ADS 2012, please see Agilent Technologies Introduces Electrical Redriver Modeling Solution to Solve Key Challenges in Designing Chip-to-Chip Links

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