Signal Integrity

Power-aware Signal Integrity and EMI/EMC On High-speed Digital Chip-to-Chip Links

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High-speed Digital Seminars in Twenty European Cities

Posted April 12th, 2013 · 2 Comments · Seminar


By Colin Warwick

We’re offering a series of free High-speed Digital Design and Verification seminars in twenty European cites. The tour begins 28 May and runs until 27 June. Seating is limited, so please register early to avoid dissappointment.

Seminar topic will cover:

  • High Speed Digital Design to Prototyping approach
  • How to anticipate Signal Integrity Issues: improve my Channel Simulation by using Electromagnetic based model
  • Explore your design space including IBIS AMI models with Advanced Channel Simulation and Optimization
  • How to characterize and debug high speed digital links on your physical prototype – what part of your design is eating up your Eye margins? Analysis

Please click on the link for more details and the registration information: High-speed Digital Design and Verification seminars in Europe.


2 Comments so far ↓

  • Shlomi Zigdon

    I m the Founder of Board/PCB Design College for SI PI & EMC. started 1995. committee-member of IPC2251 with Dr Eric Bogatin IPC2222 & IPC2226.
    would like to offer to be a Lecturer for your seminars in Israel /Europe and more.
    A second offer is to introduce your products by integrating training in my SI/PI/EMC classes
    yours sincerely
    Shlomi Zigdon

  • Colin Warwick

    Hello Shlomi, Thanks! I’ll be in touch directly.

    — Colin

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