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Power-aware Signal Integrity and EMI/EMC On High-speed Digital Chip-to-Chip Links

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Xilinx and Agilent DDR4 at 2400 Mb/s for JEDEC Compliance

Posted April 18th, 2014 · Please leave a comment · Video


Thanks to Xilinx for this video clip featuring my colleague Ai-Lee Grumbine demonstrating our DDR4 compliance app on their demo board with the UltraScale 2400Mb/s DDR4 controller. (Please be patient: the video stream takes a few seconds to buffer.)


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