Here are the papers from DesignCon 2015 that have one or more Keysight EEsof EDA co-author:
- With Xilinx: Ultrascale DDR4 De-emphasis and CTLE Feature Optimization with Statistical Engine for BER Specification Paper Slides
- With Xilinx: IBIS-AMI Modeling and Simulation of 56G PAM4 Link Systems Paper Slides
- With Xilinx and John Baprawski Consulting: A New Methodology for Developing IBIS-AMI Models Paper Slides
- With Speeding Edge and Wild River Technology: Breaking the 32 Gb/s Barrier: PCB Materials, Simulations, and Measurements Tutorial slides
- With industry panelists, moderated by Martin Rowe: Closing The Loop: What Do We Do When Measurement & Simulations Don’t Match? Panel discussion
Thanks to our customer co-authors for working with us on these projects!