Signal Integrity

Power-aware Signal Integrity and EMI/EMC On High-speed Digital Chip-to-Chip Links

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Entries Tagged as 'PCI Express'

Webcast: How to Optimize Your SerDes Design During the Pre-layout Phase

September 17th, 2014 · No Comments · Webcast

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Live webcast Thursday, September 25, 2014 on stackup and controlled impedance line design using metrics that matter: post-EQ eye metrics.

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Connect to Experts – PCI Express, USB and DDR Simulations Made Easy

February 13th, 2009 · 3 Comments · Seminar

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Connect to the Agilent Experts seminar series: PCI Express, USB, and DDR Simulations Made Easy.

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“Woodstock” for PCI Express Fans…

June 4th, 2008 · No Comments · Conference

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Agilent is platinum sponsor at the Peripheral Component Interconnect-Special Interest Group Developers Conference.

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